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AMD Turion II M520 specifications
| General information | |
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| Type | CPU / Microprocessor |
| Market segment | Mobile |
| Family | AMD Turion II Dual-Core Mobile |
| Model number ? | M520 |
| CPU part number |
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| Stepping codes | AAEEC AE NAEIC AE |
| Frequency ? | 2300 MHz |
| Bus speed ? | Dual-channel 400 MHz DDR2 SDRAM Memory controller One 1800 MHz 16-bit HyperTransport link |
| Clock multiplier ? | 11.5 |
| Package | 638-pin micro-PGA |
| AMD Package number | 30405 |
| Socket | Socket S1 (S1g3) |
| Size | 1.38" x 1.38" / 3.5cm x 3.5cm |
| Introduction date | Sep 10, 2009 |
| Architecture / Microarchitecture | |
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| Microarchitecture | K10 |
| Platform | Tigris |
| Processor core ? | Caspian |
| Core stepping ? | DA-C2 |
| CPUID | 100F62 |
| Manufacturing process | 0.045 micron SOI |
| Data width | 64 bit |
| The number of cores | 2 |
| The number of threads | 2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 64 KB 2-way set associative instruction caches 2 x 64 KB 2-way set associative data caches |
| Level 2 cache size ? | 2 x 512 KB 16-way set associative caches |
| Multiprocessing | Uniprocessor |
| Features | |
| Low power features | PowerNow! 2.0 |
| Integrated peripherals / components | |
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| Integrated graphics | None |
| Memory controller |
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| Other peripherals | HyperTransport technology 3.0 |
| Electrical / Thermal parameters | |
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| Thermal Design Power ? | 35 Watt |